在家实在闲的没事儿干,翻出来了大三上学期的EDA课的小实验,也就是设计一个二愣子交通灯啦,只会自己按设定好的时间闪,红灯、绿灯,黄灯和转向灯;

  • 各灯显示时长:哎呀~ 懒得写了,后面程序里都有。
  • 芯片:FPGA、Cylone IV E 系列的 EP4CE6E22C8,144引脚。
  • 外置时钟:1Hz

以下是这个小实验的完整的程序:

module  traffic(
            input clk,
            output reg r1,
            output reg y1,
            output reg g1,
            output reg b1,
            output reg r2,
            output reg y2,
            output reg g2,
            output reg b2
            );
        parameter yellow_time = 5;
        parameter green_time  = 20;
        parameter blue_time = 10;
        reg [2:0] state;

        always @(posedge clk)
            case (state)
                0:      /*南北绿,东西红*/
                    begin
                        r1 <= 1'b0;
                        y1 <= 1'b0;
                        g1 <= 1'b1;
                        b1 <= 1'b0;
                        r2 <= 1'b1;
                        y2 <= 1'b0;
                        g2 <= 1'b0;
                       b2 <= 1'b0;
                    end
                1:      /*南北黄,东西红*/
                    begin
                        r1 <= 1'b0;
                        y1 <= 1'b1;
                        g1 <= 1'b0;
                        b1 <= 1'b0;
                        r2 <= 1'b1;
                        y2 <= 1'b0;
                        g2 <= 1'b0;
                        b2 <= 1'b0;
                    end
                2:      /*南北左转,东西红*/
                    begin
                        r1 <= 1'b0;
                        y1 <= 1'b0;
                        g1 <= 1'b0;
                        b1 <= 1'b1;
                        r2 <= 1'b1;
                        y2 <= 1'b0;
                        g2 <= 1'b0;
                        b2 <= 1'b0;
                    end
                3:  /*南北红,东西绿*/
                    begin
                        r1 <= 1'b1;
                        y1 <= 1'b0;
                        g1 <= 1'b0;
                        b1 <= 1'b0;
                        r2 <= 1'b0;
                        y2 <= 1'b0;
                        g2 <= 1'b1;
                        b2 <= 1'b0;
                    end
                4:  /*南北红,东西黄*/
                    begin
                        r1 <= 1'b1;
                        y1 <= 1'b0;
                        g1 <= 1'b0;
                        b1 <= 1'b0;
                        
                        r2 <= 1'b0;
                        y2 <= 1'b1;
                        g2 <= 1'b0;
                        b2 <= 1'b0;
                    end
                
                
            default:    /*南北红,东西左转*/
                begin
                    r1 <= 1'b1;
                    y1 <= 1'b0;
                    g1 <= 1'b0;
                    b1 <= 1'b0;
                    r2 <= 1'b0;
                    y2 <= 1'b0;
                    g2 <= 1'b0;
                    b2 <= 1'b1;
                end
            endcase
        
        always @(posedge clk)
            begin
                reg [4:0] count;
                begin
                    if(count == 0)
                        begin
                            if(state == 5)
                                state <= 0;
                            else 
                                state <= state +1;
                            case    (state)
                                0:
                                    count = yellow_time;
                                1:
                                    count = blue_time;
                                2:
                                    count =  green_time;
                                3:
                                    count = yellow_time;
                                4:
                                    count = blue_time;
                                default:
                                    count = green_time;
                            endcase
                        end
                    else
                        count = count - 1;              
                end             
            end 
endmodule

这个是引脚配置,书上都有哒,就是顺序老是配反,搞得我改了好几遍(其实本人很细心得啦QAQ)。

这个是最后的那个原理图

内容来源于网络如有侵权请私信删除
你还没有登录,请先登录注册
  • 还没有人评论,欢迎说说您的想法!