【HDLBits刷题日记】06 Basic Gates

module top_module (
    input in,
    output out);
assign out=in;
endmodule

module top_module (
    output out);
assign out=1'b0;
endmodule

module top_module (
    input in1,
    input in2,
    output out);
    assign out=!(in1|in2);
endmodule

module top_module (
    input in1,
    input in2,
    output out);
    assign out=in1&~in2;
endmodule

module top_module (
    input in1,
    input in2,
    input in3,
    output out);
    assign out=in3^(~(in1^in2));
endmodule

module top_module( 
    input a, b,
    output out_and,
    output out_or,
    output out_xor,
    output out_nand,
    output out_nor,
    output out_xnor,
    output out_anotb
);
    assign out_and=a&b;
    assign out_or=a|b;
    assign out_xor = a^b;
    assign out_nand=~(a&b);
    assign out_nor=~(a|b);
    assign out_xnor = ~(a^b);
    assign out_anotb = a&~b;
endmodule

module top_module ( 
    input p1a, p1b, p1c, p1d,
    output p1y,
    input p2a, p2b, p2c, p2d,
    output p2y );

    assign p1y=~(p1a&p1b&p1c&p1d);
    assign p2y=~(p2a&p2b&p2c&p2d);
endmodule

module top_module( 
    input x3,
    input x2,
    input x1,  // three inputs
    output f   // one output
);
    always@(*)
    begin
        case({x3,x2,x1})
            3'b000:f=0;
            3'b001:f=0;
            3'b010:f=1;
            3'b011:f=1;
            3'b100:f=0;
            3'b101:f=1;
            3'b110:f=0;
            3'b111:f=1;
        endcase
    end

endmodule

module top_module ( input [1:0] A, input [1:0] B, output z ); 
    assign z=(A==B)?1'b1:1'b0;
endmodule

module top_module (input x, input y, output z);
    assign z=(x^y)&x;
endmodule

module top_module ( input x, input y, output z );
    assign z=~(x^y);
endmodule

module top_module (input x, input y, output z);
wire z1,z2;
    A IA1(x,y,z1);
    B IB1(x,y,z2);
    assign z=(z1|z2)^(z1&z2);
endmodule
module A (input x, input y, output z);
    assign z=(x^y)&x;
endmodule
module B ( input x, input y, output z );
    assign z=~(x^y);
endmodule

module top_module (
    input ring,
    input vibrate_mode,
    output ringer,       // Make sound
    output motor         // Vibrate
);
    assign ringer=(ring&~vibrate_mode)?1'b1:1'b0;
    assign motor=(ring&vibrate_mode)?1'b1:1'b0;
endmodule

module top_module (
    input too_cold,
    input too_hot,
    input mode,
    input fan_on,
    output heater,
    output aircon,
    output fan
); 
    assign heater=(mode==1'b1&&too_cold == 1'b1)?1'b1:1'b0;
    assign aircon=(mode==1'b0&&too_hot == 1'b1)?1'b1:1'b0;
    assign fan=(heater||aircon||fan_on)?1'b1:1'b0;
endmodule

module top_module( 
    input [2:0] in,
    output [1:0] out );
    assign out=in[0]+in[1]+in[2];
endmodule

module top_module( 
    input [3:0] in,
    output [2:0] out_both,
    output [3:1] out_any,
    output [3:0] out_different );
    assign out_both[2:0]={in[3]&in[2],in[2]&in[1],in[1]&in[0]};
    assign out_any[3:1]={in[3]|in[2],in[2]|in[1],in[1]|in[0]};
    assign out_different[3:0]={in[3]^in[0],in[3]^in[2],in[2]^in[1],in[1]^in[0]};
endmodule

module top_module( 
    input [99:0] in,
    output [98:0] out_both,
    output [99:1] out_any,
    output [99:0] out_different );
    assign out_both=in[98:0]&in[99:1];
    assign out_any=in[99:1]|in[98:0];
    assign out_different=in^{in[0],in[99:1]};
endmodule